DCAN500 FPGA evaluation board perform CAN communication over DC power lines at bit rates up to 500 Kbps. The board contains a FPGA and Analog-front-end boards.

Description

The DCAN500 FPGA Evaluation Board (EVB) emulates and test the DCAN500 device in a system. Multiple DCAN500 boards can communicate over vehicle’s DC power line using the CAN protocol.

The EVB contains all the required hardware for its operation such as a line protection network, passive filters and a 10V to 36V switching power supply.

The board performs the CAN protocol over DC power lines at data rates of up to 500Kbps. The EVB may be connected directly to a CAN host (CAN-Controller) through its JP1 Host I/O connector.

Operation

The received CAN message signal from the DC line passes through a protection network, input buffer and a passive filter to a comparator. The FPGA board receives the digitized signal, decode the CAN message and transfer it through J1 HDO pin to external CAN controller.

At the transmitter side, the external CAN controller sends a CAN message to the FPGA board via J1 HDI pin. The message is buffered into packets, modulated and conducted over the DC power line.

Features

  • Interface using the CAN bus protocol
  • Contains FPGA and AFE boards for CAN communication
  • Bit rates of up to 500Kbps.
  • CAN arbitration over the powerlines.
  • Built-in Modem, Error Correction and Synchronization.
  • Replace the CAN bus control wire.
  • Allows flexible network designs..
  • Sleep Mode for low power consumption

Applications

  • Battery Management Systems [BMS].
  • Adding a redundant CAN channel.
  • Replacing existing CAN bus wires

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